AVID: A Reliable Substrate for Speculation and Limited Execution∗

With the advent of DIVA style correctness checking [1], processor architecture becomes much less constricted, to the point that even an entirely nonfunctional processor with a DIVA checker will produce correct results. Without the need for absolute correctness, processor designs that work “most of the time” are still acceptable. In this paper, we examine input dependent architecture variance (AVID), a design that uses communication with a DIVA checker to change processor functionality to best fit the needs of the current process. By throttling the functionality of different units to be the minimum necessary, we can avoid losing cycles and reduce total power usage. We explore AVID in relation to three areas of processor functionality: branch prediction, memory disambiguation, and multiplication and division computation. The applicability of AVID is not restricted to these areas, but we use these as a proof of concept. We begin by explaining the operation of the AVID architecture. We then evaluate the performance gains and power savings realized by implementing the AVID architecture and testing it on several benchmarks. In order to evaluate power savings, we introduce a simplified power model, and explain how we derived our power values. We concluded that appreciable savings in power usage can be achieved by using AVID on the branch predictors, and that us∗It must be noted that this is the first formal paper by either of the authors, and as such it’s layout borrows heavily from other papers, specifically the original DIVA paper [1] by Todd Austin. 1For acronym’s sake we can refer to the design as Architecture Variance, Input Dependent. AVID sounds better than IDAV, and it’s DIVA backwards, which seemed appropriate. ing AVID to throttle the multiplication and division units can lower the CPI. We concluded that AVID is a viable architecture that has the ability to save time and power, and the potential to be applied to several aspects of computer architecture.